Field_ops_lib.Reg_with_enable
Shadow Signal.reg and Signal.pipeline because we want ~enable to be a non-optional argument.
val reg : Hardcaml.Reg_spec.t -> enable:Hardcaml.Signal.t -> Hardcaml.Signal.t -> Hardcaml.Signal.t
val pipeline : Hardcaml.Reg_spec.t -> enable:Hardcaml.Signal.t -> n:int -> Hardcaml.Signal.t -> Hardcaml.Signal.t