Module Bram_reduce.Make

Parameters

module Config : Config

Signature

val latency : int
module I : sig ... end
module O : sig ... end
val create : build_mode:Hardcaml.Build_mode.t -> Hardcaml.Scope.t -> Hardcaml.Signal.t I.t -> Hardcaml.Signal.t O.t
val hierarchical : ?build_mode:Hardcaml.Build_mode.t -> ?instance:string -> Hardcaml.Scope.t -> Hardcaml.Circuit.With_interface(I)(O).create