Module `Field_ops_lib.Barrett_reduction`

Calculates a mod p using barret reduction, where p is a compile-time known prime.

The full barrett reduction algorithm is described in section 3 of the Efficient FPGA Modular Multiplication Implementation paper.

Barrett reduction comprises of the following steps

stage 1: q <- approx_msb_mult(a, m)

stage 2: qp <- half_width_mult(q, p)

stage 3: t <- a - qp

stage 4: keep subtracting p from t until 0 <= t < p

Config.t can be used to control the exact parameters used in every stage.

module Config : sig ... end

module With_interface (M : sig ... end) : sig ... end

val hierarchical : 
  scope:Hardcaml.Scope.t ->
  config:Config.t ->
  p:Z.t ->
  clock:Hardcaml.Signal.t ->
  enable:Hardcaml.Signal.t ->
  Hardcaml.Signal.t Hardcaml.With_valid.t ->
  Hardcaml.Signal.t Hardcaml.With_valid.t

Instantiates barrett reduction module.